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Google Replaces TSMC CoWoS with Intel EMIB-T Packaging for Next-Gen TPU, Supporting 8-10x Larger Die Size by 2026

GateNews
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According to SemiAnalysis, Google's next-generation tensor processing unit (TPU) codenamed Humufish is abandoning Taiwan Semiconductor Manufacturing Company's (TSMC) CoWoS advanced packaging technology in favor of Intel's EMIB-T 2.5D packaging approach. Intel claims its EMIB-T can support die sizes up to 8-10 times larger than TSMC's CoWoS-S, which has a maximum scalability of approximately 3.3 times mask reticle size. The shift marks Intel's entry into hyperscale cloud customer supply chains and addresses TSMC's persistent CoWoS capacity constraints that have limited production for AI accelerators. EMIB-T uses miniature silicon bridges instead of large silicon interposers, targeting improved cost efficiency and design flexibility, with Intel claiming competitive yields and computational density by 2026.
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